1. Field of the Invention
This invention relates to the handling of exceptions in data processing apparatus. More particularly, this invention relates to a data processing apparatus and method for handling exceptions occurring during processing of vector instructions.
2. Description of the Prior Art
It is known to provide data processing systems that support vector instructions. Examples of such systems are the Cray 1 and Digital Equipment Corporation MultiTitan processors.
Vector instructions are desirable as they allow code density to be increased since a single instruction can specify a plurality of data processing operations. Digital signal processing such as audio or graphics processing is particularly well suited to exploiting vector operations as there is often a requirement to perform the same operation upon a sequence of related data values, e.g. performing a filter operation by multiplying a sequence of signal values by tap coefficients of a digital filter.
Typically, the data processing system is arranged to have a number of registers for storing data values required for execution of the data processing operations specified by the vector instruction. The vector instruction is then decoded into N scalar data processing operations (where N represents the vector length), typically taking the form of N iterations of a particular data processing operation, each iteration operating on a different set of register numbers.
It is proposed to provide a data processing apparatus for processing vector instructions, whereby a vector instruction is decoded into a sequence of data processing operations, and an execution unit comprising a plurality of pipelined stages is then provided for executing the sequence of data processing operations. Each data processing operation is passed one after the other through the execution unit. Such an approach enables vector processing to be achieved in a data processing apparatus which is smaller, consumes less power, and is cheaper, than conventional vector machines which execute the constituent data processing operations of a vector instruction in parallel.
One problem that arises when processing vector instructions in a data processing apparatus that employs an execution unit comprising a plurality of pipelined stages is that of handling exceptions that may occur during the processing of the vector instruction. Any of the scalar iterations in to which the vector operation is decomposed could give rise to an exception condition being detected. In such a situation, provision needs to be made for handling such an exception condition when it arises, in order to ensure that the vector instruction is processed correctly.
One way to achieve this is to pass the entire vector instruction to an exception processing tool for handling. Whilst this ensures that an effective procedure is in place for handling an exception occurring during processing of a vector instruction, it effectively means that any time spent by the data processing apparatus in processing scalar iterations of the vector instruction prior to detection of the exception condition is wasted.
It is an object of the present invention to provide an improved technique for handling exceptions occurring during processing of vector instructions.